Iet Computers And Digital Techniques

Performance and energy aware robust specification of control execution patterns under dropped samples

Resilient training of neural network classifiers with approximate computing techniques for hardware-optimised implementations

Energy efficient VLSI architecture of real-valued serial pipelined FFT

Soft-error reliable architecture for future microprocessors

Removing constant-induced errors in stochastic circuits

RASSS: a hijack-resistant confidential information management scheme for distributed systems

Heterogeneity aware power abstractions for dynamic power dominated FinFET-based microprocessors

Hetro8T: power and area efficient approximate heterogeneous 8T SRAM for H.264 video decoder

Yield modelling and analysis of bundled data and ring-oscillator based designs

Leveraging design diversity to counteract process variation: theory, method, and FPGA toolchain to increase yield and resilience in-situ